搜索资源列表
Project-8
- 课程设计时用verilogHDL写的MIPS CPU-MIPS CPU coded with Verilog HDL
CPU
- 使用Verilog HDL语言完成一个简单的多周期MIPS微处理器的设计-Using Verilog HDL language to complete a simple multi-cycle MIPS microprocessor design
irq_cpu
- This file define the irq handler for MIPS CPU interrupts.
MIPSCPUverilog
- mips流水线CPU的实现，用的是verilog语言，描述了整个cpu的过程。存储、指令、处理等。-mips CPU Verilog
pipelined-mips-cpu-master
- misp 5 stage pipeline
mips
- 一个单周期流水CPU的实现，其中mips4.vhd是顶层文件-A single cycle CPU
mips-mt-fpaff
- CPU mask used to set process affinity for MT VPEs TCs with FPUs.
irq-mips-gic
- Get per-cpu bitmaps for Linux v2.13.6.
CPU
- 32位MIPS指令CPU，实现31条指令，并且附带LED，七段数码管，VGA，键盘，UART等外设接口-32 MIPS instruction CPU, a 31 instructions, and comes with LED, seven-segment LED, VGA, keyboard, UART peripheral interfaces
MIPS-Lite2
- logisim 单周期cpu 支持addu subu lw sw 等指令-logisim single cpu support addu subu le sw and so on
mips789.tar
- MIPS CPU RTL Reference Code
mips
- Verilog语言开发的基于mips指令集的流水线cpu，只支持部分指令-Verilog language-based development pipeline cpu mips instruction set support only part of the instruction
CPU_driver
- Cpu 板级支持资源代码 持资源代码-mips cpu is 4730 4740 Jun ucosii source mips cpu is 4730 4740 Jun ucosii source
m_cycle_mips
- verilog设计的5状态多周期mips -multiple cycle mips CPU design of Verilog
Implement-a-CPU
- 在FPGA赛灵思基础3上使用Verilog HDL实现支持MIPS操作子集的CPU-Implement a CPU which supports a subset of MIPS operations using Verilog HDL on FPGA Xilinx Basys 3
mips
- 这是一个简单地CPU，用MIPS实现，可以实现基本的一些指令，供学习MIPS使用，还包括一个LED模块(This is a simple CPU, implemented with MIPS)
lu
- 16位MIPS指令集，VHDL实现，非常简单，非常粗暴(library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_unsigned.all; use ieee.std_logic_arith.all;)
Verilog HDL使用中该注意的问题及一些模块代码
- cpu仿真，提供vivado上的cpu仿真生成文件(cpu simulated,but no one can get 20 words in this short file how can I do? just tell you the simulated file and vivado system is 2015)
PipelineCPU
- 1. understand how to improve CPU performance 2. master the working principle of pipelined MIPS microprocessor. 3. understand the concept of data adventure, control risk and the solution of pipeline conflict. 4. mastering the testing method of pipe
OpenMIPS
- 《自己动手做CPU》书后源码 包含各章节实例 分节使用(source code of mips CPU)